/* This file contains the definitions and documentation for the Register Transfer Expressions (rtx's) that make up the Register Transfer Language (rtl) used in the Back End of the GNU compiler. Copyright (C) 1987, 1988 Free Software Foundation, Inc. This file is part of GNU CC. GNU CC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 1, or (at your option) any later version. GNU CC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with GNU CC; see the file COPYING. If not, write to the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ /* Expression definitions and descriptions for all targets are in this file. Some will not be used for some targets. The fields in the cpp macro call "DEF_RTL_EXPR()" are used to create declarations in the C source of the compiler. The fields are: 1. The internal name of the rtx used in the C source. It is a tag in the enumeration "enum rtx_code" defined in "rtl.h". By convention these are in UPPER_CASE. 2. The name of the rtx in the external ASCII format read by read_rtx(), and printed by print_rtx(). These names are stored in rtx_name[]. By convention these are the internal (field 1) names in lower_case. 3. The print format, and type of each rtx->fld[] (field) in this rtx. These formats are stored in rtx_format[]. The meaning of the formats is documented in front of this array in rtl.c */ /* --------------------------------------------------------------------- Expressions (and "meta" expressions) used for structuring the rtl representation of a program. --------------------------------------------------------------------- */ /* an expression code name unknown to the reader */ DEF_RTL_EXPR(UNKNOWN, "UnKnown", "*") /* (NIL) is used by rtl reader and printer to represent a null pointer. */ DEF_RTL_EXPR(NIL, "nil", "*") /* --------------------------------------------------------------------- Expressions used in constructing lists. --------------------------------------------------------------------- */ /* a linked list of expressions */ DEF_RTL_EXPR(EXPR_LIST, "expr_list", "ee") /* a linked list of instructions. The insns are represented in print by their uids. */ DEF_RTL_EXPR(INSN_LIST, "insn_list", "ue") /* ---------------------------------------------------------------------- Expression types for machine descripions. These do not appear in actual rtl code in the compiler. ---------------------------------------------------------------------- */ /* Appears only in machine descriptions. Means use the function named by the second arg (the string) as a predicate; if matched, store the structure that was matched in the operand table at index specified by the first arg (the integer). If the second arg is the null string, the structure is just stored. A third string argument indicates to the register allocator restrictions on where the operand can be allocated. If the target needs no restriction on any instruction this field should be the null string. The string is prepended by: '=' to indicate the operand is only written to. '+' to indicate the operand is both read and written to. Each character in the string represents an allocatable class for an operand. 'g' indicates the operand can be any valid class. 'i' indicates the operand can be immeadiate (in the instruction) data. 'r' indicates the operand can be in a register. 'm' indicates the operand can be in memory. 'o' a subset of the 'm' class. Those memory addressing modes that can be offset at compile time (have a constant added to them). Other characters indicate target dependent operand classes and are described in each target's machine description. For instructions with more than one operand, sets of classes can be separated by a comma to indicate the appropriate multi-operand constraints. There must be a 1 to 1 correspondence between these sets of classes in all operands for an instruction. */ DEF_RTL_EXPR(MATCH_OPERAND, "match_operand", "iss") /* Appears only in machine descriptions. Means match only something equal to what is stored in the operand table at the index specified by the argument. */ DEF_RTL_EXPR(MATCH_DUP, "match_dup", "i") /* Apply a predicate, AND match recursively the operands of the rtx. Operand 0 is the operand-number, as in match_operand. Operand 1 is a predicate to apply (as a string, a function name). Operand 2 is a vector of expressions, each of which must match one subexpression of the rtx this construct is matching. */ DEF_RTL_EXPR(MATCH_OPERATOR, "match_operator", "isE") /* Appears only in machine descriptions. Defines the pattern for one kind of instruction. Operand: 0: names this instruction. If the name is the null string, the instruction is in the machine description just to be recognized, and will never be emitted by the tree to rtl expander. 1: is the pattern. 2: is a string which is a C expression giving an additional condition for recognizing this pattern. A null string means no extra condition. 3: is the action to execute if this pattern is matched. If this assembler code template starts with a * then it is a fragment of C code to run to decide on a template to use. Otherwise, it is the template to use. 4: optionally, a string of machine-dependant information about the insn. */ DEF_RTL_EXPR(DEFINE_INSN, "define_insn", "sEssS") /* Definition of a peephole optimization. 1st operand: vector of insn patterns to match 2nd operand: C expression that must be true 3rd operand: template or C code to produce assembler output. 4: optionally, a string of machine-dependant information about the insn. */ DEF_RTL_EXPR(DEFINE_PEEPHOLE, "define_peephole", "EssS") /* Definition of a combiner pattern. Operands not defined yet. */ DEF_RTL_EXPR(DEFINE_COMBINE, "define_combine", "Ess") /* Define how to generate multiple insns for a standard insn name. 1st operand: the insn name. 2nd operand: vector of insn-patterns. Use match_operand to substitute an element of `recog_operand'. 3rd operand: C expression that must be true for this to be available. This may not test any operands. 4th operand: Extra C code to execute before generating the insns. This might, for example, create some RTX's and store them in elements of `recog_operand' for use by the vector of insn-patterns. (`operands' is an alias here for `recog_operand'). */ DEF_RTL_EXPR(DEFINE_EXPAND, "define_expand", "sEss") /* SEQUENCE appears in the result of a `gen_...' function for a DEFINE_EXPAND that wants to make several insns. Its elements are the bodies of the insns that should be made. `emit_insn' takes the SEQUENCE apart and makes separate insns. */ DEF_RTL_EXPR(SEQUENCE, "sequence", "E") /* Refers to the address of its argument. This appears only in machine descriptions, indicating that any expression that would be acceptable as the operand of MEM should be matched. */ DEF_RTL_EXPR(ADDRESS, "address", "e") /* ---------------------------------------------------------------------- Expressions types used for things in the instruction chain. All formats must start with "iuu" to handle the chain. Each insn expression holds an rtl instruction and its semantics during back-end processing. See macros's in "rtl.h" for the meaning of each rtx->fld[]. ---------------------------------------------------------------------- */ /* An instruction that cannot jump. */ DEF_RTL_EXPR(INSN, "insn", "iuueiee") /* An instruction that can possibly jump. Fields ( rtx->fld[] ) have exact same meaning as INSN's except field 3 is also used in jump.c to point to the label jumped to. Field 7 is used in jump.c as the JUMP_LABEL. */ DEF_RTL_EXPR(JUMP_INSN, "jump_insn", "iuueiee0") /* An instruction that can possibly call a subroutine but which will not change which instruction comes next in the current function. Fields ( rtx->fld[] ) have exact same meaning as INSN's. */ DEF_RTL_EXPR(CALL_INSN, "call_insn", "iuueiee") /* A marker that indicates that control will not flow through. */ DEF_RTL_EXPR(BARRIER, "barrier", "iuu") /* Holds a label that is followed by instructions. Operand: 3: is a number that is unique in the entire compilation. 4: is used in jump.c for the use-count of the label. and in flow.c to point to the chain of label_ref's to this label. */ DEF_RTL_EXPR(CODE_LABEL, "code_label", "iuui0") /* Say where in the code a source line starts, for symbol table's sake. Contains a filename and a line number. Line numbers <= 0 are special: 0 is used in a dummy placed at the front of every function just so there will never be a need to delete the first insn; -1 indicates a dummy; insns to be deleted by flow analysis and combining are really changed to NOTEs with a number of -1. -2 means beginning of a name binding contour; output N_LBRAC. -3 means end of a contour; output N_RBRAC. */ DEF_RTL_EXPR(NOTE, "note", "iuusn") /* INLINE_HEADER is use by inline function machinery. The information it contains helps to build the mapping function between the rtx's of the function to be inlined and the current function being expanded. */ DEF_RTL_EXPR(INLINE_HEADER, "inline_header", "iuuiiiiiiii") /* ---------------------------------------------------------------------- Top level constituents of INSN, JUMP_INSN and CALL_INSN. ---------------------------------------------------------------------- */ /* Several operations to be done in parallel. */ DEF_RTL_EXPR(PARALLEL, "parallel", "E") /* A string that is passed through to the assembler as input. One can obviously pass comments through by using the assembler comment syntax. These occur in an insn all by themselves as the PATTERN. They also appear inside an ASM_OPERANDS as a convenient way to hold a string. */ DEF_RTL_EXPR(ASM_INPUT, "asm_input", "s") /* An assembler instruction with operands. 1st operand is the instruction template. 2nd operand is the constraint for the output. 3rd operand is the number of the output this expression refers to. When an insn stores more than one value, a separate ASM_OPERANDS is made for each output; this integer distinguishes them. 4th is a vector of values of input operands. 5th is a vector of modes and constraints for the input operands. Each element is an ASM_INPUT containing a constraint string and whose mode indicates the mode of the input operand. 6th is the name of the containing source file. 7th is the source line number. */ DEF_RTL_EXPR(ASM_OPERANDS, "asm_operands", "ssiEEsi") /* Vector of addresses, stored as full words. */ /* Each element is a LABEL_REF to a CODE_LABEL whose address we want. */ DEF_RTL_EXPR(ADDR_VEC, "addr_vec", "E") /* Vector of address differences X0 - BASE, X1 - BASE, ... First operand is BASE; the vector contains the X's. The machine mode of this rtx says how much space to leave for each difference. */ DEF_RTL_EXPR(ADDR_DIFF_VEC, "addr_diff_vec", "eE") /* ---------------------------------------------------------------------- At the top level of an instruction (perhaps under PARALLEL). ---------------------------------------------------------------------- */ /* Assignment. Operand 1 is the location (REG, MEM, PC, CC0 or whatever) assigned to. Operand 2 is the value stored there. ALL assignment must use SET. Instructions that do multiple assignments must use multiple SET, under PARALLEL. */ DEF_RTL_EXPR(SET, "set", "ee") /* Indicate something is used in a way that we don't want to explain. For example, subroutine calls will use the register in which the static chain is passed. */ DEF_RTL_EXPR(USE, "use", "e") /* Indicate something is clobbered in a way that we don't want to explain. For example, subroutine calls will clobber some physical registers (the ones that are by convention not saved). */ DEF_RTL_EXPR(CLOBBER, "clobber", "e") /* Call a subroutine. Operand 1 is the address to call. Operand 2 is the number of arguments. */ DEF_RTL_EXPR(CALL, "call", "ee") /* Return from a subroutine. */ DEF_RTL_EXPR(RETURN, "return", "") /* ---------------------------------------------------------------------- Primitive values for use in expressions. ---------------------------------------------------------------------- */ /* numeric integer constant */ DEF_RTL_EXPR(CONST_INT, "const_int", "i") /* numeric double constant. Operand 0 is the MEM that stores this constant in memory, or various other things (see comments at immed_double_const in varasm.c). Operand 1 is a chain of all CONST_DOUBLEs in use in the current function. Remaining operands hold the actual value. The number of operands may be more than 2 if cross-compiling; see init_rtl. */ DEF_RTL_EXPR(CONST_DOUBLE, "const_double", "e0ii") /* This is used to encapsulate an expression whose value is constant (such as the sum of a SYMBOL_REF and a CONST_INT) so that it will be recognized as a constant operand rather than by arithmetic instructions. */ DEF_RTL_EXPR(CONST, "const", "e") /* program counter. Ordinary jumps are represented by a SET whose first operand is (PC). */ DEF_RTL_EXPR(PC, "pc", "") /* A register. The "operand" is the register number, accessed with the REGNO macro. If this number is less than FIRST_PSEUDO_REGISTER than a hardware register is being referred to. */ DEF_RTL_EXPR(REG, "reg", "i") /* One word of a multi-word value. The first operand is the complete value; the second says which word. The WORDS_BIG_ENDIAN flag controls whether word number 0 (as numbered in a SUBREG) is the most or least significant word. This is also used to refer to a value in a different machine mode. For example, it can be used to refer to a SImode value as if it were Qimode, or vice versa. Then the word number is always 0. */ DEF_RTL_EXPR(SUBREG, "subreg", "ei") /* This one-argument rtx is used for move instructions that are guaranteed to alter only the low part of a destination. Thus, (SET (SUBREG:HI (REG...)) (MEM:HI ...)) has an unspecified effect on the high part of REG, but (SET (STRICT_LOW_PART (SUBREG:HI (REG...))) (MEM:HI ...)) is guaranteed to alter only the bits of REG that are in HImode. The actual instruction used is probably the same in both cases, but the register constraints may be tighter when STRICT_LOW_PART is in use. */ DEF_RTL_EXPR(STRICT_LOW_PART, "strict_low_part", "e") /* A memory location; operand is the address. Can be nested inside a VOLATILE. */ DEF_RTL_EXPR(MEM, "mem", "e") /* Reference to an assembler label in the code for this function. The operand is a CODE_LABEL found in the insn chain. The unprinted fields 1 and 2 are used in flow.c for the LABEL_NEXTREF and CONTAINING_INSN. */ DEF_RTL_EXPR(LABEL_REF, "label_ref", "u00") /* Reference to a named label: the string that is the first operand, with `_' added implicitly in front. Exception: if the first character explicitly given is `*', to give it to the assembler, remove the `*' and do not add `_'. */ DEF_RTL_EXPR(SYMBOL_REF, "symbol_ref", "s") /* The condition code register is represented, in our imagination, as a register holding a value that can be compared to zero. In fact, the machine has already compared them and recorded the results; but instructions that look at the condition code pretend to be looking at the entire value and comparing it. */ DEF_RTL_EXPR(CC0, "cc0", "") /* ===================================================================== A QUEUED expression really points to a member of the queue of instructions to be output later for postincrement/postdecrement. QUEUED expressions never become part of instructions. When a QUEUED expression would be put into an instruction, instead either the incremented variable or a copy of its previous value is used. Operands are: 0. the variable to be incremented (a REG rtx). 1. the incrementing instruction, or 0 if it hasn't been output yet. 2. A REG rtx for a copy of the old value of the variable, or 0 if none yet. 3. the body to use for the incrementing instruction 4. the next QUEUED expression in the queue. ====================================================================== */ DEF_RTL_EXPR(QUEUED, "queued", "eeeee") /* ---------------------------------------------------------------------- Expressions for operators in an rtl pattern ---------------------------------------------------------------------- */ /* if_then_else. This is used in representing ordinary conditional jump instructions. Operand: 0: condition 1: then expr 2: else expr */ DEF_RTL_EXPR(IF_THEN_ELSE, "if_then_else", "eee") /* Comparison, produces a condition code result. */ DEF_RTL_EXPR(COMPARE, "compare", "ee") /* plus */ DEF_RTL_EXPR(PLUS, "plus", "ee") /* Operand 0 minus operand 1. */ DEF_RTL_EXPR(MINUS, "minus", "ee") /* Minus operand 0. */ DEF_RTL_EXPR(NEG, "neg", "e") DEF_RTL_EXPR(MULT, "mult", "ee") /* Operand 0 divided by operand 1. */ DEF_RTL_EXPR(DIV, "div", "ee") /* Remainder of operand 0 divided by operand 1. */ DEF_RTL_EXPR(MOD, "mod", "ee") /* Unsigned multiply and divide. */ DEF_RTL_EXPR(UMULT, "umult", "ee") DEF_RTL_EXPR(UDIV, "udiv", "ee") DEF_RTL_EXPR(UMOD, "umod", "ee") /* Bitwise operations. */ DEF_RTL_EXPR(AND, "and", "ee") DEF_RTL_EXPR(IOR, "ior", "ee") DEF_RTL_EXPR(XOR, "xor", "ee") DEF_RTL_EXPR(NOT, "not", "e") /* Operand: 0: value to be shifted. 1: number of bits. ASHIFT and LSHIFT are distinguished because on some machines these allow a negative operand and shift right in that case. */ DEF_RTL_EXPR(LSHIFT, "lshift", "ee") DEF_RTL_EXPR(ASHIFT, "ashift", "ee") DEF_RTL_EXPR(ROTATE, "rotate", "ee") /* Right shift operations, for machines where these are not the same as left shifting with a negative argument. */ DEF_RTL_EXPR(ASHIFTRT, "ashiftrt", "ee") DEF_RTL_EXPR(LSHIFTRT, "lshiftrt", "ee") DEF_RTL_EXPR(ROTATERT, "rotatert", "ee") /* These unary operations are used to represent incrementation and decrementation as they occur in memory addresses. The amount of increment or decrement are not represented because they can be understood from the machine-mode of the containing MEM. These operations exist in only two cases: 1. pushes onto the stack. 2. created automatically by the life_analysis pass in flow.c. */ DEF_RTL_EXPR(PRE_DEC, "pre_dec", "e") DEF_RTL_EXPR(PRE_INC, "pre_inc", "e") DEF_RTL_EXPR(POST_DEC, "post_dec", "e") DEF_RTL_EXPR(POST_INC, "post_inc", "e") /* Comparison operations. The ordered comparisons exist in two flavors, signed and unsigned. */ DEF_RTL_EXPR(NE, "ne", "ee") DEF_RTL_EXPR(EQ, "eq", "ee") DEF_RTL_EXPR(GE, "ge", "ee") DEF_RTL_EXPR(GT, "gt", "ee") DEF_RTL_EXPR(LE, "le", "ee") DEF_RTL_EXPR(LT, "lt", "ee") DEF_RTL_EXPR(GEU, "geu", "ee") DEF_RTL_EXPR(GTU, "gtu", "ee") DEF_RTL_EXPR(LEU, "leu", "ee") DEF_RTL_EXPR(LTU, "ltu", "ee") /* Represents the result of sign-extending the sole operand. The machine modes of the operand and of the SIGN_EXTEND expression determine how much sign-extension is going on. */ DEF_RTL_EXPR(SIGN_EXTEND, "sign_extend", "e") /* Similar for zero-extension (such as unsigned short to int). */ DEF_RTL_EXPR(ZERO_EXTEND, "zero_extend", "e") /* Similar but here the operand has a wider mode. */ DEF_RTL_EXPR(TRUNCATE, "truncate", "e") /* Similar for extending floating-point values (such as SFmode to DFmode). */ DEF_RTL_EXPR(FLOAT_EXTEND, "float_extend", "e") DEF_RTL_EXPR(FLOAT_TRUNCATE, "float_truncate", "e") /* Conversion of fixed point operand to floating point value. */ DEF_RTL_EXPR(FLOAT, "float", "e") /* With fixed-point machine mode: Conversion of floating point operand to fixed point value. Value is defined only when the operand's value is an integer. With floating-point machine mode (and operand with same mode): Operand is rounded toward zero to produce an integer value represented in floating point. */ DEF_RTL_EXPR(FIX, "fix", "e") /* Conversion of unsigned fixed point operand to floating point value. */ DEF_RTL_EXPR(UNSIGNED_FLOAT, "unsigned_float", "e") /* With fixed-point machine mode: Conversion of floating point operand to *unsigned* fixed point value. Value is defined only when the operand's value is an integer. */ DEF_RTL_EXPR(UNSIGNED_FIX, "unsigned_fix", "e") /* Absolute value */ DEF_RTL_EXPR(ABS, "abs", "e") /* Square root */ DEF_RTL_EXPR(SQRT, "sqrt", "e") /* Find first bit that is set. Value is 1 + number of trailing zeros in the arg., or 0 if arg is 0. */ DEF_RTL_EXPR(FFS, "ffs", "e") /* Reference to a signed bit-field of specified size and position. Operand 0 is the memory unit (usually SImode or QImode) which contains the field's first bit. Operand 1 is the width, in bits. Operand 2 is the number of bits in the memory unit before the first bit of this field. If BITS_BIG_ENDIAN is defined, the first bit is the msb and operand 2 counts from the msb of the memory unit. Otherwise, the first bit is the lsb and operand 2 counts from the lsb of the memory unit. */ DEF_RTL_EXPR(SIGN_EXTRACT, "sign_extract", "eee") /* Similar for unsigned bit-field. */ DEF_RTL_EXPR(ZERO_EXTRACT, "zero_extract", "eee") /* Local variables: mode:c version-control: t End: */